I am reading through the Service Mode documentation and I have a few questions. I was wondering if anyone could help me.
Question 1:
Service mode document S-9.2.3 has instructions for “Address Only” mode. Starting on line 147 shows a packet sequence:
Power on Cycle (if needed)
3 or more Reset packets
5 or more Page-Preset-packets
6 or more Page-Preset or Reset Packets
Optional Power off/Power on cycle
3 or more Reset packets
5 or more Writes (or Verifies) to CV1
10 or more identical rights or reset packets
Optional Power off
I’m trying to understand why the sequence involves a number of Resets and Page Resets, followed by an optional power cycling, followed by 3 more resets, before you do the actual Writing (or Verification). This same procedure is also listed for Physical registering. Could someone please help me understand why you go through all of these initial steps? And what the optional power cycling is about?
Question 2:
Service mode document S-9.2.3 Line 87 discusses the use of “reset packets” in Sercice Mode, and refers you to document S-9.2 for detail. The example in S-9.2 for a reset packet uses a short preamble. Would you use a long preamble for this (in Service Mode)?
Question 3:
Power On cycle (Line 77) simply says at least 20 valid packets. Do these packets have the long preamble? Is there some generic placebo packet that is generally used for this?
Thank you for any assistance.
Don’t confuse the Reset Packet with a decoder reset - it is not the same thing. Reset simply clears all the operating conditions - set speed to 0 and shuts off all functions. It does not alter an CV settings in the decoder.
Address only mode is a special case of physical register mode, neither of which is needed by any modern decoder. Physical registers were used in early and pre-DCC systems similar to how CVs are used, but there were a limited number and accessed differently, hence the register preset packets. These got mapped to equivalent CVs so you can use an old system that only does register mode to program a newer decoder, but unless you are supporting ancient equipment it’s not really necessary to implement any of this.
The extra packets are simply to allow the decoder time to process the programming instructions. Above that section in S-9.2.3 is the verbiage related to the sequence, which mentions sending the instruction until you get an ack from the decoder - the number of repeitions given should satisfy any decoder while providing a reasonable timeout instead of just going into an endless loop waiting for an ack that never comes.
Line 75 in S-9.2.3 says why you use a long preamble in service mode programming. You would not use a short preamble witht he reset packet in programming, you would use a long preamble.
Notice back around 95 which talks about the more modern Direct mode programming, and notice also that it uses a much simplified packet sequence compared to Phy mode. Furrther down, Paged mode is sort of an in-between, using the 8 Phy registers to access all 1024 CVs.
Direct BIT mode is the absolutely fastest under NMRA protocols, as it takes no more than 8 queries to determine the value of a CV. The decoder an only ack or not ack a simple question, in bit mode you can ask “is bit 4 = 1”. It byte mode, you can ask if the entire byte = 32 but if that is false the only way to determine the value of
Thanks very much! learning a lot. So the direct bit mode you are describing as most efficient … is that the section described in line 130 - 142?